Memory manager for simplest microprocessor on FPGA

Abbas Ibrahim Mbulwa (2015) Memory manager for simplest microprocessor on FPGA. Universiti Malaysia Sabah. (Unpublished)


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Preliminary studies show that commercial microprocessors are not suited for many research projects due to the fact that they are closed source and they cannot be modified. Most non-commercial microprocessor architectures do not have proper memory management that can enable and extend their usability. The proper use of computer memory is vital to ensure efficiency of process executions in microprocessor systems. This project designed a memory management of a simplest microprocessor on FPGA platform. The project implements the design of the simplest 32-bit microprocessor and its memory system using schematic approach. The project uses the concept of management as the art of managing the main memory, buffer and registers. The memory management was designed to allow the microprocessor to use main memory or I/O buffers in a controlled manner with the help of the microprocessor signals generated from a well designed control unit by using four operation code bits. This memory management is also designed to improve memory bandwidth so as to reduce the microprocessor to memory speed miss-match. This design showed some of the characteristic of reliable future microprocessor design such as flexibility, programmability, adaptable, reconfigurable. Altera DE2-115 board was used to validate the design.

Item Type: Academic Exercise
Uncontrolled Keywords: FPGA Technologies and Architecture, Altera FPGA , Microprocessor Architecture
Subjects: Q Science > QA Mathematics > QA75 Electronic computers. Computer science
Depositing User: ADMIN ADMIN
Date Deposited: 27 Jun 2016 02:45
Last Modified: 07 Nov 2017 02:40

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